The other error (error[E0277]: the trait bound cuda::device::Cuda: Conv1DKernel<f32> is not satisfied) seems to be related to this:

I'm new to cuda/cudnn, but it appears that the cuda implementation of Conv1DKernel is behind that cfg condition.
I believe that to solve this, the same condition (#[cfg(all(not(feature = "cudnn"), feature = "cuda"))]) should be present on the Conv1DKernel Device bound, relaxing it for the cudnn case:

According to the new documentation of these functions, it seems like this functionality can be achieved with inline assembly? I'd much prefer that than entirely removing these functions.

I didn't read much material on this - but I'm afraid that every float operations would need to be implemented in asm (not sure)? if this is the case, I think this would require a lot of effort.

Could this be deferred to a later issue? Because if not, the CI would be blocking all prs until this is resolved.
From their discussion, they considered outright removing the functions (instead of deprecating it), so I think that leaving the code unchanged is not recommended.